NVIDIA NCP-AII Exam - Topic 5 Question 7 Discussion

Updating an NVIDIA DGX system (like the H100) is a multi-layered process because the system contains numerous programmable logic devices, including CPLDs, FPGAs, and the EROT (Electrically Resilient Root of Trust) modules. Many of these low-level hardware components cannot be updated via a simple operating system reboot. NVIDIA's official firmware update procedure requires a specific sequence to 'commit' the new images to the hardware. First, the update utility (like nvfwupd) writes the images to the flash memory. To activate them, a 'Cold Power Cycle' (removing and restoring power) is necessary to force the hardware to reload from the newly written flash blocks. Furthermore, because the BMC (Baseboard Management Controller) orchestrates the power-on sequence and monitors the EROT, it must be reset (Option D) to synchronize its state with the new component versions. Finally, an 'AC Power Cycle' ensures that even the standby-power components, such as the power delivery controllers and CPLDs, undergo a full hardware reset. Skipping these steps can result in 'Incomplete' or 'Mismatched' firmware versions, where the OS reports one version while the hardware continues to run old, potentially buggy code in the background.